ECE 120 Introduction to Computing /… / Homeworks
Homework 7
Sequential logic elements and FSM analysis
1. Circuits with feedback loop
This question pertains to the following circuit.
a. Complete the table below; t
...
ECE 120 Introduction to Computing /… / Homeworks
Homework 7
Sequential logic elements and FSM analysis
1. Circuits with feedback loop
This question pertains to the following circuit.
a. Complete the table below; the entries in the first row have been provided for you. Hint: Fill in the w and x values first. Express the
next (stable) y and z values in terms of their current values.
C D w x Next y value Next z value
0 0 1 1 y z
0 1
1 0
1 1
b. To determine that the circuit implements a D latch, verify each of the following conditions:
1. Specify the input combinations which will force y to become 0.
2. Specify the input combinations which will force y to become 1.
3. For what input combinations do y and z hold their values?
2. Master Slave Flip Flop
Shown below is the logic diagram of a D flipflop. The master is a gated D latch, and the slave is a gated SR latch.
Homework 7 is due on Friday, March 10 at 2:30pm.
Remember to include your Discussions section (e.g. AB1) and follow the complete Homework submission guidelines.
Please ask all questions about this assignment during the TA and UA office hours. Questions sent via email will not
be answered.
Please remember to submit your homework before the deadline and staple your submission. Homework that is not stapled or
late will NOT be graded. No exceptions.
Always show all your work, or you risk losing credit.
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