Electrical Engineering > QUESTIONS & ANSWERS > Digital Integrated Circuits University of WaterlooECE 637Solution_Adder (All)
Digital Integrated Circuits University of WaterlooECE 637Solution_Adder
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ECE-637, Assignment #1 Chapter 11, Digital Integrated Circuits, a Design Perspective, J. Rabaey, 2nd Edition 11.2) A magnitude comparator for unsigned numbers can be constructed using full adders a ... nd Boolean logic gates as building blocks. For this problem you are given a cell library consisting of full adders and arbitrary fan-in logic gates (i.e., AND, OR, INVERTER, etc.). a. Design an N-bit magnitude comparator with outputs A B and A = B using a minimal number of Boolean logic gates. The result of this process should be a diagram in the spirit of Figure 11.5. Specify the value of any required control signals (e.g., Cin ). A=B if A-B = 0 A-B = A+ B +1 [Show More]
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