Engineering > Lab Report > CpE 487 Digital Design Lab Lab 1: Seven Segment Decoder (All)

CpE 487 Digital Design Lab Lab 1: Seven Segment Decoder

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CpE 487 Digital Design Lab Lab 1: Seven Segment Decoder1. Getting Started The purpose of this lab is to introduce you to the NEXYS2 FPGA development board and a software environment that will allow ... you to design a hardware system in VHDL, synthesize your design to create an FPGA configuration file, download the configuration file on to an FPGA and then run the configured FPGA to achieve the desired hardware functionality. 1.1 Hardware We will be using the Digilent Nexys2 FPGA development board shown in Figure 1. It includes:  500k-gate Xilinx Spartan 3E FPGA  16 MB SDRAM  16 MB Flash ROM  Platform Flash for holding startup configuration code  50MHz oscillator  VGA, RS232 and PS/2 ports  Simple I/O devices including 8 LEDs, 4-digit 7-seg. display, 4 buttons and 8 slide switches The Nexys2 board connects to a host computer via a USB2 interface. The USB port provides board power (no external power supply is required) and a programming interface1. Getting Started The purpose of this lab is to introduce you to the NEXYS2 FPGA development board and a software environment that will allow you to design a hardware system in VHDL, synthesize your design to create an FPGA configuration file, download the configuration file on to an FPGA and then run the configured FPGA to achieve the desired hardware functionality. 1.1 Hardware We will be using the Digilent Nexys2 FPGA development board shown in Figure 1. It includes:  500k-gate Xilinx Spartan 3E FPGA  16 MB SDRAM  16 MB Flash ROM  Platform Flash for holding startup configuration code  50MHz oscillator  VGA, RS232 and PS/2 ports  Simple I/O devices including 8 LEDs, 4-digit 7-seg. display, 4 buttons and 8 slide switches The Nexys2 board connects to a host computer via a USB2 interface. The USB port provides board power (no external power supply is required) and a programming interface [Show More]

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