WGU C952 CH6 Vocabulary Latest Updated 2022

WGU C952 CH6 Vocabulary Latest Updated 2022 Temporal Locality ✔✔data location is referenced when it will tend to be referenced again soon Spatial Locality ✔✔data location is referenced, data locations with nearby addr ...

WGU C952 CH6 Vocabulary Latest Updated 2022 Temporal Locality ✔✔data location is referenced when it will tend to be referenced again soon Spatial Locality ✔✔data location is referenced, data locations with nearby addresses will tend to be referenced soon Block (or line) ✔✔the minimum unit of information that can be either present or not present in a cache Miss Penalty ✔✔the time required to fetch a block into a level of memory hierarchy form the lower level includes: time to access block, transmit for one level to another, insert it into the level that experienced the miss, and pass block back to requestor Hit Time ✔✔time required to access a level of memory hierarchy includes: time needed to determine whether hit or miss Flash Memory ✔✔memory type with EEPROM (electrically erasable programmable read-only memory) Track ✔✔one of thousands of concentric circles that make up the surface a a magnetic disk Sector ✔✔one the segments that make up a track on a magnetic disk the smallest amount of information that is read or written Seek ✔✔the process of positioning a read/write head over the proper track Rotational Latency ✔✔time required for the desired sector of a disk to rotate under the read/write head usually half the rotation time Direct-Mapped Cache ✔✔a cache structure in which each memory location is mapped to exactly on location in the cache Tag ✔✔a field in a table used for a memory hierarchy that contains the address information required to identify the associated block in the hierarchy corresponds to a requested word Valid Bit ✔✔a field in the tables of memory hierarchy that indicates that the associated block in the hierarchy contains valid data cache miss ✔✔the data are not present in the cache write-thorugh ✔✔a scheme in which writes always update both the cache and the next lower level of the memory hierarchy ensures data is always consistent between two levels of memory write buffer ✔✔a queue that holds data while the data are waiting to be written to memory write-back ✔✔a scheme that handles writes by updating values only to the block in the cache -> write block to lower level when block is replaced Split Cache ✔✔a scheme in which a level of memory hierarchy is composed of two independent caches that operate in parallel with each other one handles instructions one handles data Fully Associative Cache ✔✔cache structure in which a block can be placed in any location in the cache Set-Associative Cache ✔✔a cache that has a fixed number of locations (at least 2) where each block can be placed LRU (Least Recently Used) ✔✔a replacement scheme in which the block replaced is the one that has been unused for longest time Multilevel Cache ✔✔memory hierarchy with multiple levels of caches (rather than just cache and main memory) Error Detection Code ✔✔does not give precise location Virtual Memory ✔✔a technique that uses main memory as a "cache" for secondary storage Physical Address ✔✔address in main memory Protedtion ✔✔isolate the OS form a user process Page Fault ✔✔an event that occurs when an accessed page is not present in main memory Address Translation ✔✔happens when virtual address is mapped to an address used to access memory Page Table ✔✔the table containing the virtual to physical address translations in a virtual memory system indexed by the virtual page number contains physical page number Swap Space ✔✔The space on the disk reserved for the full virtual memory space of a process. Translation Lookaside Buffer ✔✔a cache that keeps track of recently used address mappings to try and avoid an access to the page table Aliasing ✔✔a situation in which two addresses access the same object can occur in virtual memory when there are two virtual addresses for the same physical page Supervisor Mode (Kernel Mode) ✔✔mode indicating that a running process is an OS process