VLSI DESIGN -----2 MARK QUESTIONS & ANSWERS

VLSI DESIGN -----2 MARK QUESTIONS & ANSWERS UNIT-1,II &III 1. What are four generations of Integration Circuits? SSI (Small Scale Integration) MSI (Medium Scale Integration) LSI (Large Scale Integration) VLSI (Very ...

VLSI DESIGN -----2 MARK QUESTIONS & ANSWERS UNIT-1,II &III 1. What are four generations of Integration Circuits? SSI (Small Scale Integration) MSI (Medium Scale Integration) LSI (Large Scale Integration) VLSI (Very Large Scale Integration) 2. Give the advantages of IC? Size is less High Speed Less Power Dissipation 3. Give the variety of Integrated Circuits? More Specialized Circuits Application Specific Integrated Circuits (ASICs) Systems-On-Chips 4. Give the basic process for IC fabrication Silicon wafer Preparation Epitaxial Growth Oxidation Photolithography Diffusion Ion Implantation Isolation technique MetallizationAssembly processing & Packaging 5.What are the various Silicon wafer reparation? Crystal growth & doping Ingot trimming & grinding Ingot slicing Wafer polishing & etching Wafer cleaning. 6. Different types of oxidation? Dry & Wet Oxidation 7. What is the transistors CMOS technology provides? N-type transistors & p-type transistors. 8. What are the different layers in MOS transistors? Drain, Source & Gate 9. What is Enhancement mode transistor? The device that is normally cut-off with zero gate bias. 10. What is Depletion mode Device? The Device that conduct with zero gate bias. 11. When the channel is said to be pinched –off? If a large Vds is applied this voltage with deplete the Inversion layer .This Voltage effectively pinches off the channel near the drain. 12.Give the different types of CMOS process? p-well process, n-well process Silicon-On-Insulator Process Twin- tub Process 13.What are the steps involved in twin-tub process?Tub Formation Thin-oxide Construction Source & Drain Implantation Contact cut definition Metallization. 14.What are the advantages of Silicon-on-Insulator process? No Latch-up Due to absence of bulks transistor structures are denser than bulk silicon. 15. What is BiCMOS Technology? It is the combination of Bipolar technology & CMOS technology. 16. What are the basic processing steps involved in BiCMOS process? Additional masks defining P base region N Collector area Buried Sub collector (SCCD) Processing steps in CMOS process 17. What are the advantages of CMOS process? Low power Dissipation High Packing density Bi directional capability 18. What are the advantages of CMOS process? Low Input Impedance Low delay Sensitivity to load. 19. What is the fundamental goal in Device modeling? To obtain the functional relationship among the terminal electrical variables of the device that is to be modeled.20.Define Short Channel devices? Transistors with Channel length less than 3- 5 microns are termed as Short channel devices. With short channel devices the ratio between the lateral & vertical dimensions are reduced. 21.What is pull down device? A device connected so as to pull the output voltage to the lower supply voltage usually 0V is called pull down device. 22.What is pull up device? A device connected so as to pull the output voltage to the upper supply voltage usually VDD is called pull up device. 23. Why NMOS technology is preferred more than PMOS technology? N- channel transistors has greater switching speed when compared tp PMOS ansistors. What are the different operating regions foe an MOS transistor? Cutoff region Non- Saturated Region Saturated Region What are the different MOS layers? n-diffusion p-diffusion Polysilicon Metal 26.What is Stick Diagram? It is used to convey information through the use of color code. Also it is the cartoon of a chip layout. 27.What are the uses of Stick diagram? It can be drawn much easier and faster than a complex layout. These are especially important tools for layout built from large cells.28.Give the various color coding used in stick diagram? Green – n-diffusion Red- polysilicon Blue –metal Yellow- implant Black-contact areas. 29. Compare between CMOS and bipolar technologies. CMOS Technology Bipolar technology • Low static power dissipation • High power dissipation • High input impedance (low drive • Low input impedance (high drive current) current)• Scalable threshold voltage • High noise margin • Low voltage swing logic • High packing density • Low packing density • High delay sensitivity to load (fan- • Low delay sensitivity to load out limitations)