Programming > QUESTIONS & ANSWERS > CMPE 102 Shell programming - San Jose State University - Chapter 4 Quiz: SP22: CMPE-102 Sec 04 - Ass (All)

CMPE 102 Shell programming - San Jose State University - Chapter 4 Quiz: SP22: CMPE-102 Sec 04 - Assembly Language Programming. MAY 2022. Score for this quiz: 10 out of 10

Document Content and Description Below

CMPE 102 Shell programming - San Jose State University - Chapter 4 Quiz: SP22: CMPE-102 Sec 04 - Assembly Language Programming. MAY 2022. Score for this quiz: 10 out of 10 Chapter 4 Quiz: SP22: CMPE-102 Sec 04 - Assembly Language Programming https://sjsu.instructure.com/courses/1479457/quizzes/1569389 1/5 Chapter 4 Quiz Score for this quiz: 8 out of 10 Submitted Mar 4 at 2:15pm This attempt took 9 minutes. Chapter 4 Quiz This quiz is a self-check opportunity to test your knowledge of the topics and concepts for this learning objective. Please reach out to your instructor with any questions that you may have. Question 1 1 / 1 pts The following statement will assemble without errors: mov DWORD PTR [eax], 1234h True This study source was downloaded by 100000857336479 from CourseHero.com on 04-23-2023 12:43:48 GMT -05:00 5/18/22, 10:40 PM Chapter 4 Quiz: SP22: CMPE-102 Sec 04 - Assembly Language Programming https://sjsu.instructure.com/courses/1479457/quizzes/1569389 2/5 False Question 2 1 / 1 pts The following instructions will set the Overflow flag: mov al,0D7h add al,75h True False Question 3 1 / 1 pts The following instruction will assemble correctly: dec BYTE PTR [edi] True False Question 4 0 / 1 pts The following instructions will set the Overflow flag: mov al,80h sub al,-5 orrect Answer orrect Answer True This study source was downloaded by 100000857336479 from CourseHero.com on 04-23-2023 12:43:48 GMT -05:00 5/18/22, 10:40 PM Chapter 4 Quiz: SP22: CMPE-102 Sec 04 - Assembly Language Programming https://sjsu.instructure.com/courses/1479457/quizzes/1569389 3/5 ou Answered ou Answered False Question 5 1 / 1 pts The MOV instruction permits a move between two 8-bit memory operands, as long as one operand uses the BYTE PTR operator. true false Question 6 0 / 1 pts The EIP register can be the source operand of a MOV, ADD, or SUB instruction. ou Answered ou Answered false orrect Answer orrect Answer true Question 7 1 / 1 pts If AL contains +127 and you add 3 to AL, the Overflow flag will be set. false true This study source was downloaded by 100000857336479 from CourseHero.com on 04-23-2023 12:43:48 GMT -05:00 5/18/22, 10:40 PM Chapter 4 Quiz: SP22: CMPE-102 Sec 04 - Assembly Language Programming https://sjsu.instructure.com/courses/1479457/quizzes/1569389 4/5 Question 8 1 / 1 pts Suppose BX and DX both contain positive integers. If adding them produces a negative result, the Overflow flag will be set. true false Question 9 1 / 1 pts The Overflow flag will never be set when subtracting a positive integer from a negative integer. true false Question 10 1 / 1 pts When you move a 16-bit constant or an 8-bit constant into a 64-bit register, the upper bits of the destination operand are cleared. true false 5/18/22, 10:40 PM Chapter 4 Quiz: SP22: CMPE-102 Sec 04 - Assembly Language Programming https://sjsu.instructure.com/courses/1479457/quizzes/1569389 5/5 Quiz Score: 8 out of 10

[Show More]

Last updated: 3 years ago

Preview 1 out of 5 pages

Buy Now

Instant download