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CMPE 102 Shell programming - San Jose State University - Chapter 7 Quiz: SP22: CMPE-102 Sec 04 - Assembly Language Programming. MAY 2022. Score for this quiz: 10 out of 10.

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CMPE 102 Shell programming - San Jose State University - Chapter 7 Quiz: SP22: CMPE-102 Sec 04 - Assembly Language Programming. MAY 2022. Score for this quiz: 10 out of 10. Chapter 7 Quiz: SP22: CMPE-102 Sec 04 - Assembly Language Programming https://sjsu.instructure.com/courses/1479457/quizzes/1571087 1/5 Chapter 7 Quiz Due Mar 27 at 11:59pm Points 10 Questions 10 Available Mar 21 at 12am - May 20 at 11:59pm 2 months Time Limit 10 Minutes This quiz is a self-check opportunity to test your knowledge of the topics and concepts for this learning objective. Please reach out to your instructor with any questions that you may have. Question 1 1 / 1 pts The SAR instruction is suitable for signed integers. true false 2023 12:53:44 GMT -05:00 5/18/22, 10:40 PM Chapter 7 Quiz: SP22: CMPE-102 Sec 04 - Assembly Language Programming https://sjsu.instructure.com/courses/1479457/quizzes/1571087 2/5 Question 2 1 / 1 pts The ROR instruction is only suitable for signed integers. true false Question 3 1 / 1 pts The SAR and SHR instructions perform the same operation. true false Question 4 1 / 1 pts The MUL instruction sets the Overflow flag if the upper half of the product is not equal to zero. false true 2023 12:53:44 GMT -05:00 5/18/22, 10:40 PM Chapter 7 Quiz: SP22: CMPE-102 Sec 04 - Assembly Language Programming https://sjsu.instructure.com/courses/1479457/quizzes/1571087 3/5 Question 5 1 / 1 pts The MUL instruction sets the Carry flag if the upper half of the product is not equal to zero. true false Question 6 0 / 1 pts When the MUL BL instruction executes, the upper half of the product ends up in the AH register. ou Answered ou Answered false orrect Answer orrect Answer true Question 7 1 / 1 pts When the MUL BX instruction executes, the 32-bit product ends into the EAX register. false true 2023 12:53:44 GMT -05:00 5/18/22, 10:40 PM Chapter 7 Quiz: SP22: CMPE-102 Sec 04 - Assembly Language Programming https://sjsu.instructure.com/courses/1479457/quizzes/1571087 4/5 Question 8 1 / 1 pts The destination operand of the IMUL instruction may be a memory operand. true false Question 9 1 / 1 pts The DIV instruction generates a divide overflow condition when the remainder is too large to fit into the destination operand. false true Question 10 1 / 1 pts The binary value of AL after the following instructions have executed is 11100010. mov al,11000101b sar al,1 True False 2023 12:53:44 GMT -05:00 5/18/22, 10:40 PM Chapter 7 Quiz: SP22: CMPE-102 Sec 04 - Assembly Language Programming https://sjsu.instructure.com/courses/1479457/quizzes/1571087 5/5 Quiz Score: 9 out of 10 2023 12:53:44 GMT -05:00 Powered by TCPDF (www.tcpdf.org)

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