WGU C952 Computer Architecture Questions and Answers Already Graded A

WGU C952 Computer Architecture Questions and Answers Already Graded A Which access does a register file rely on to properly function? Read and write access Write only access Read only access No access ✔✔Read and w ...

WGU C952 Computer Architecture Questions and Answers Already Graded A Which access does a register file rely on to properly function? Read and write access Write only access Read only access No access ✔✔Read and write access What is the binary representation of instructions? Machine language Operating system Assembly language Systems software ✔✔Machine language Which feature of the IBM 360/91 was incorporated into the majority of microprocessors developed in the 21st century? -Branch prediction allowed the processor to proceed with the next instruction. -Algorithm innovations allowed the improved parallel execution of instructions. -Pipeline innovations allowed for reservation stations and the commit unit. -Pipeline innovations allowed for dynamically scheduled pipelined processors. ✔✔Algorithm innovations allowed the improved parallel execution of instructions. Which key design element changed in 2005 to drive continued improvements in computing capability? Multiprocessor architecture Transistor architecture DRAM technology Frame buffering ✔✔Multiprocessor architecture Which term refers to the same instruction applied to multiple data streams? SIMD MIMD SPMD SISD ✔✔SIMD What makes vector-based code more efficient than conventional code? Usage of LEGv8 architecture code Usage of Multimedia extensions (MMX) Frequency of pipeline hazards is lower Frequency of pipeline hazards is higher ✔✔Frequency of pipeline hazards is lower Which two elements are required to implement R-format arithmetic logic unit (ALU) operations? ALU and GPU ALU and register file GPU and register file Datapath and COD ✔✔ALU and register file Which component of a computer moderates the action of its other components? Control Datapath Memory Output ✔✔Control Given the following 8-bit integer binary variables: X1 = 11000110 X2 = 11110111 What is the value in X3 after the following command? ADD X3, X2, X1 100111101 11000110 11110111 Overflow ✔✔Overflow What is the approximate range of a 64-bit unsigned integer? 0 to 18,446,744,073,709,551,615 0 to 4,294,967,295 −2,147,483,648 to 2,147,483,647 −9,223,372,036,854,775,808 to 9,223,372,036,854,775,807 ✔✔0 to 18,446,744,073,709,551,615 How is the integer 255 represented in memory? 0000 0000 0000 0000 0000 0000 0000 0111 0000 0000 0000 0000 0000 0000 0000 1111 0000 0000 0000 0000 0000 0000 0111 1111 0000 0000 0000 0000 0000 0000 1111 1111 ✔✔0000 0000 0000 0000 0000 0000 1111 1111 What does extending to 16 bits yield given -5 in 8-bit 2's complement 11111011? 11111100 11111011 11111111 11111011 01111111 11111011 00111111 11111011 ✔✔11111111 11111011 How many minutes does it take to wash, dry, and fold four loads of laundry using a pipelining approach, given the following information? One washer takes 30 minutes One dryer takes 40 minutes One folder takes 20 minutes 90 170 210 360 ✔✔210 The manufacturing process for producing a widget has five steps and each step in the process takes one day. What is the average number of days needed to manufacture each widget using a pipelined process to produce 10 widgets? 0.5 1.4 5 14 ✔✔1.4 Which locality principle states that if a data location is referenced then it will tend to be referenced again soon? Spatial Temporal Residual Canonical ✔✔Temporal What does each bank of modern DRAMS consist of? Rows Disk Buffers Columns ✔✔Rows What is meant by pipelining in computer architecture? -It compensates for a serial portion of the program that would otherwise limit scalability. -It employs an implementation technique where multiple instructions are overlapped in execution. -It increases the size of the problem proportionally to the increase in the number of processors. -It uses threads to improve resource utilization of a dynamically scheduled, out-of-order processor. ✔✔It employs an implementation technique where multiple instructions are overlapped in execution. What is superscalar as it relates to parallelization? -A buffer within a functional unit that holds the operands and the operation -The hardware support for reordering the order of instruction execution so as to avoid stalls -A process in which an instruction is blocked from executing, and therefore it fails to cause the following instructions to wait -A technique that enables the processor to execute more than one instruction per clock cycle by selecting them during execution ✔✔A technique that enables the processor to execute more than one instruction per clock cycle by selecting them during execution The value of b is stored in r1, c is stored in r2, and a is stored in r0. Which set of ARM instructions will accomplish a = b & c? AND r0, r1, r2 OR r0, r1, r2 EOR r0, r1, r2 ORR r0, r1, r2 ✔✔AND r0, r1, r2 Registers X1, X2, X3 have corresponding data stored in each location: X1: A X2: B X3: C Which set of ARM instructions will accomplish A=B+C? ADD X3, X2, X1 ADD X1, X2 #X3 ADD X3 #X2, X1 ADD X1, X2, X3 ✔✔ADD X1, X2, X3 The variables f and g are assigned to the registers X3 and X4, respectively in these ARM instructions. Loop: SUBS XZR, X3, X4 B.GE Exit LSL X3, X3, 1 B Loop Exit: What are the corresponding statements in the C language? while (f < g) { f = f << 1; } while (f > g) { f = f << 1; } while (f <= g) { f = f << 1; } while(f == g){ f = f << 1; } ✔✔while